Senior SoC Design Engineer (WiFi PHY)

About the job

At Pairwise, we are a team of engineers, operators, and builders focused on enabling the next generation of technical talent to do their best work. We partner with leading technology companies to deliver high-performance engineering solutions across embedded systems, networking, semiconductors, and software. Our teams have contributed to some of the most advanced products in consumer, infrastructure, and communications technologies.

This full-time role offers the chance to work on-site with a global leader in the technology industry, contributing to impactful, technically challenging projects in a high-caliber and fast-moving environment.

Overview

We are seeking a highly skilled and experienced professional to join our team as a key contributor to the development of cutting-edge WiFi PHY solutions within System on Chip (SoC) architectures. This role is integral to our mission of delivering high-performance, low-power wireless communication solutions. The successful candidate will be responsible for designing and implementing RTL solutions, focusing on the integration and optimization of WiFi PHY functionalities within ARM-based SoC architectures.

Key Responsibilities

• Design and implement RTL solutions using Verilog or VHDL, specifically targeting ARM-based SoC architectures.
• Focus on the integration and optimization of WiFi PHY functionalities within custom SoC designs.
• Engage in all phases of SoC design, from initial specification through to design and verification.
• Develop physical layer IP blocks within SoCs, ensuring robust verification and testing processes.
• Collaborate with cross-functional teams to ensure seamless integration of custom-designed IP blocks.
• Utilize advanced RTL design, simulation, and verification tools to ensure the highest quality of design outputs.

Minimum Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Science, or a related field.
• Extensive experience (5+ years) in SoC design and RTL development.
• Expertise in Verilog or VHDL for RTL design.
• Proven track record with ARM-based SoC designs and a strong understanding of low-power design techniques.
• Proficiency in advanced RTL design, simulation, and verification tools.

Preferred Qualifications

• Master’s or PhD degree in Electrical Engineering, Computer Science, or a related field.
• Previous work experience at leading chip companies such as MediaTek, Broadcom, Qualcomm, Marvell, Cisco, Realtek, or Quantenna.
• Experience with wireless PHY RTL design for WiFi, or extensive knowledge of other related wireless protocols.
• Strong analytical and problem-solving skills, with the ability to thrive in a fast-paced, iterative development environment.

Benefits

Pairwise offers competitive compensation and access to a range of benefits for employees, including premium PPO and HMO medical insurance coverage, dental, vision, FSA, life insurance, short/long-term disability insurance, a company-matched 401k plan, and a generous PTO policy.  

We are proud to work with engineers and professionals who want to make an impact through their craft. If you're looking to be part of a team that values technical excellence, autonomy, and practical problem solving - we'd love to hear from you!

Pairwise is an equal opportunity employer. We are committed to building a diverse team and fostering an inclusive workplace. All qualified applicants will receive consideration for employment without regard to race, color, religion, gender, sexual orientation, gender identity or expression, national origin, age, disability, veteran status, or any other legally protected status.