Principal Reliability Engineer

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com. 

We are seeking an experienced and hands-on Principal Reliability Engineer to drive reliability strategy across a diverse portfolio of semiconductor products. This role is ideal for candidates with a strong background in reliability modeling within the semiconductor industry. You will lead initiatives and serve as an internal consultant, defining and implementing reliability methodologies across component, chiplet, photonic, and board-level products—ensuring robust design from early development through end-of-life.

Key Responsibilities: 

• Develop and implement comprehensive design reliability methodologies for semiconductor circuits and systems including pre-qualification, production release, ongoing reliability monitoring (ORM), and soft error evaluation.
• Lead the application of advanced reliability modeling techniques to analyze trade-offs between performance and long-term product reliability.
• Apply expert knowledge of semiconductor reliability failure mechanisms, including but not limited to Electrostatic Discharge (ESD), Latch-Up (LU), Soft Errors, Gate Oxide Time-Dependent Dielectric Breakdown (GOX TDDB), Electromigration, and Device Aging for the evaluation results in new product introduction qualification.
• Establish and refine usage models to guide design-phase reliability assessments and integrate learning from manufacturing and field return data in post-silicon validation.
• Collaborate across design, product engineering, manufacturing, and reliability teams to capture and institutionalize best practices that improve product robustness and reduce DPPM.
• Serve as a subject matter expert helping design engineers incorporate reliability-aware design principles early in development.
• Drive continuous improvement in design-for-reliability tools, processes, and organizational knowledge.
• Utilizes a hands-on approach to comprehend silicon and package-level failure mechanisms, collaborating seamlessly with internal and external teams to drive root cause analysis and resolution.
• Work closely with vendors to review and interpret component specifications, reliability data, and qualification reports. Evaluate vendor-provided reliability assessments, including Mean Time Between Failures (MTBF), failure-rate predictions, derating analysis, and stress test results. Collaborate with vendors to address gaps in reliability data and ensure components meet Astera Labs product requirements.

Basic Qualifications: 

• Proven leadership in driving complex technical issues to closure across global, cross-functional teams.
• Expert Knowledge of high performance / compute AI cloud infrastructure, as well as switch/network interfaces.
• Strong background in semiconductor physics, device modeling, and reliability verification techniques including an understanding of statistical & probability techniques and reliability modeling.
• Excellent communication skills, with the ability to articulate technical concepts clearly across all levels of the organization.
• Experience in technical program management and influencing product development across multiple teams.
• Demonstrated success in methodology development, tool flow integration, and process definition in a complex engineering environment.
• Working knowledge of PCBA (printed circuit board assembly) design, fabrication, and validation testing.
• Working knowledge of electronic components/devices and their failure modes & failure mechanism.

Education:

• Master’s degree (or higher) in Electrical Engineering, Applied Physics, or a related field, with 8+ years of relevant experience
• Direct experience in developing semiconductor design, technology development, and/or product reliability.
• Strong experience in product reliability, in the context of mechanical, thermal, and electrical stresses, ensuring the integrity and longevity of modules and board assemblies in diverse operational environments.
• Deep knowledge of advanced packaging technologies, including 2.5D, 3D, and chiplet architectures, as well as experience in module and system board reliability (SMT), power component, and chip-package-board interactions.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.