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Contract - Sr Staff TPM/NPU

Mountain View, CA

Contract to Hire: Sr Staff Technical Program Manager, NPU

Mountain View, CA

Hybrid

We are CARIAD, an automotive software development team with the Volkswagen Group. Our mission is to make the automotive experience safer, more sustainable, more comfortable, more digital, and more fun. To achieve that we are building the leading tech stack for the automotive industry and creating a unified software platform for over 10 million new vehicles per year. We’re looking for talented, digital minds like you to help us create code that moves the world. Together with you, we’ll build outstanding digital experiences and products for all Volkswagen Group brands that will transform mobility. Join us as we shape the future of the car and everyone around it.

​Role Summary:

The Sr Staff Technical Program Manager, NPU within the NPU Hardware & Software organization, is intended for an individual with a broad background in technical program management and semiconductor development, with significant experience managing complex chip development programs from architecture through production and external partner relationships. This role is responsible for driving the successful execution of CARIAD’s Neural Processing Unit (NPU) development, orchestrating the chip development lifecycle and managing schedules, dependencies, and deliverables across internal teams and external design partners.

Additionally, this role owns end-to-end program execution for the NPU from architecture definition through tapeout, validation, and production readiness, working in close partnership with hardware and software engineering leads to coordinate complex interdependencies and ensure delivery against functional, quality, and schedule targets.

Role Responsibilities:

NPU Development Program Management 

  • Responsible for achieving project objectives on time, on specification, on budget and on quality deliveries for the complete NPU development lifecycle
  • Prepare, maintain and track formal project plans including schedules and deliverables across hardware design, verification, software, and system integration teams
  • Communicate engineering requirements, specifications, project schedule, and budget constraints to cross-functional teams, including engineers, senior management and external partners
  • Responsible for project reporting, risk management, and escalation processes
  • Administer a formal design review process to validate each development phase completion and readiness for next phase
  • Coordinate milestone tracking and dependency management across internal teams of 15+ engineers

External Partner Management

  • Serve as primary interface with foundry partners (TSMC, GlobalFoundries, etc.) for process technology and manufacturing readiness
  • Manage relationships with design services partners for physical implementation, packaging, and test development
  • Coordinate with IP vendors for processor cores, interface IP, and memory controllers integration
  • Establish project schedules, technical requirements and delivery milestones with all external partners
  • Facilitate joint development activities including design reviews, milestone assessments, and technical problem resolution

Risk Management & Quality Assurance

  • Develop and maintain comprehensive risk registers with mitigation strategies and contingency plans
  • Coordinate cross-functional risk assessment meetings and drive resolution of technical and schedule risks
  • Establish quality gates and review processes aligned with automotive functional safety (ISO 26262) requirements
  • Support silicon validation planning and coordinate with test teams for comprehensive NPU verification
  • Drive continuous improvement initiatives to enhance development efficiency and quality

General Skills:

  • Expert communicator across cultural and team boundaries
  • Expertise in motivating teams and fostering a collaborative and productive environment
  • Background in managing multiple and competing stakeholder interests; establishing trust, clear roles and responsibilities, and goodwill between partner engineering organizations
  • Experience managing cross-functional and/or cross-team projects
  • Stakeholder management expertise with ability to coordinate complex partner relationships
  • Risk assessment and mitigation capabilities with proactive problem-solving approach
  • Coordination expertise across technical teams and external partners
  • Collaborate and work with partners for hardware development and tests
  • Collaborate and work with multiple teams across geographies and time zones

​Required Specialized Skills:

  • Extensive knowledge of semiconductor development lifecycle including architecture, RTL design, verification, physical implementation, and validation
  • Strong understanding of chip design methodologies, EDA tools, and silicon manufacturing processes
  • Experience with both hardware and software development coordination in complex system programs
  • Knowledge of automotive industry standards and functional safety (ISO 26262) processes
  • Familiarity with AI/ML hardware architectures and NPU-specific design challenges
  • Proven track record of managing cross-functional teams and external partner relationships in semiconductor industry

​Desired Skills:

  • Prior experience with NPU, GPU, or AI accelerator development programs
  • Background in automotive ADAS/AD applications and real-time system requirements
  • Experience with advanced packaging technologies and system-in-package integration
  • Knowledge of automotive qualification processes and production ramp methodologies
  • Experience with GenAI tools for accelerated engineering workflows and AI-assisted development practices
  • Enthusiasm for adopting innovative AI-augmented development practices and continuous learning in rapidly evolving GenAI technologies
  •  

​Workplace Flexibility:

  • Occasional travel may be required, less than 5%

​Years of Relevant Experience:

  • 10+ years of experience in technical program management with focus on semiconductor or chip development
  • 5+ years of experience managing complex chip design programs from architecture through production

​Required Education:

Bachelor’s degree in Electrical Engineering or Computer Engineering.

​Desired Education: 

Master’s degree in Electrical Engineering or Computer Engineering.

Workplace Flexibility:

  • ​This is a contract W2 position
  • Compensation: $88.00 - $101.00/hr
  • This role is based in Mountain View, CA. Must be local, no relocation.
  • Immediate availability is required. The selected candidate is expected to start promptly upon offer acceptance and pending successful completion of a standard background check and drug screening
  • Applicants must be currently authorized to work in the United States on a full-time basis. We are unable to provide visa sponsorship now or in the future
  • We do not accept C2C (Corp-to-Corp), 1099, or third-party agency submissions for this position

 

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