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Design Verification Engineer - CPU Core & Block

Austin, Texas, United States

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We’re looking for a CPU Block/Core Verification Engineer to join our growing verification team. In this role, you'll focus on functional verification of the CPU core, including ISA and microarchitectural test planning, stimulus development, and coverage closure. You’ll work closely with design, test, and post-silicon teams to ensure robust, high-quality delivery across the verification pipeline—from simulation to emulation and beyond.

This role is hybrid, based out of Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

 

Who You Are

  • Energized by the challenge of verifying cutting-edge Out-of-Order CPU cores and pushing performance boundaries.
  • Great at turning complex ISA and microarchitecture specs into smart, focused test plans—and seeing them through.
  • Skilled at digging into waveforms and logs to troubleshoot regressions and uncover root causes.
  • A strong collaborator who enjoys working closely with architects, designers, and validation teams to deliver high-quality silicon.

What We Need

  • Someone who can drive functional verification from planning through execution—focused on unit/core-level stimulus, debug, and coverage closure.
  • Deep familiarity with CPU architectures and ISAs like RISC-V, ARM, or x86 to build meaningful test scenarios.
  • Hands-on experience using UVM, writing testbenches in assembly/C/C++, and applying coverage-driven strategies to validate complex logic.
  • Comfort working in Verilog or VHDL, running industry-standard simulators (like VCS or Verilator), and scripting in Python or Perl to streamline workflows.

What You Will Learn

  • What it takes to verify a custom, high-performance RISC-V CPU from first principles.
  • Ways to design smart coverage and stimulus strategies across simulation, emulation, and silicon.
  • How pre-silicon and post-silicon teams collaborate to streamline debug and validation.
  • Techniques to evolve and scale CPU verification in a fast-paced, ambitious hardware org.

 

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

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