Engineering - Hardware / AI Hardware
Job
Performance Architect, AI HW
Toronto, Ontario, Canada
Power Architect
Risc-V Architect
Senior Design Verification Engineer, AI HW
Silicon Lead, Automotive/Robotics
Engineering - Hardware
Fabric SOC Architect
United States
High-Performance Computing Architect
Memory Architect
North America
Networking ASIC Architect
Power Architect, AI Data Center Chiplets
Project Administrator
Tokyo, Japan
Engineering - Hardware / Architecture
Automotive and Robotics SOC Architect
RISC-V CPU Microarchitecture / RTL
Formal Verification Lead
CPU Architect, Load-Store
Staff Technical Program Manager, Physical Design
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Technical Program Manager, RISC-V IP
Engineering - Hardware / Physical Engineering
Foundry Technologist Engineer
Physical Design Engineer - Power Grid/EMIR
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States; United States
Physical Design Engineer - STA
Senior Physical Design Engineer
SoC Physical Design Verification Engineer
SoC Top-Level Physical Design Engineer
Sr. Staff CPU Physical Design Lead
Staff Engineer Power Analysis
Staff Physical Design Engineer – EMIR
Austin, Texas, United States; Santa Clara, California, United States
CPU Core Design Verification Engineer - Contractor
Director, RISC-V Software Ecosystem
Sr. Staff Engineer, Automotive System Software
Sr. Staff Engineer, Emulation Validation Lead
Austin, Texas, United States
Sr Staff Software Engineer, Toolchain/Compiler
Staff Engineer, Platform Security Systems Software
Engineering - Hardware / RISC V
Sr. Staff Engineer, Hardware Infrastructure Lead
Staff Engineer, HPC Infrastructure
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Staff Engineer, HPC Systems Software
Austin, Texas, United States; Santa Clara, California, United States; United States
Staff Engineer, Systems Software
Australia; United States
Staff Design for Test Engineer
Staff, Design for Test Engineer (DFT)
Bengaluru, Karnataka, India
Engineering - Hardware / Silicon
Staff Design for Test STA Engineer
Santa Clara, California, United States
Sr. Engineer, SoC Design Verification – AI/ML Accelerator Chiplets
Engineering - Hardware / SoC
Sr Staff Engineer, SoC RTL Design
Staff Engineer, ASIC Design Methodology
Boston, Massachusetts, United States; Toronto, Ontario, Canada
Staff Engineer, SoC - DFD Design Verification
Boston, Massachusetts, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Engineering - Software
Principal Engineer, AI Compiler
Sr. Engineer, Software - AI Compiler
Sr. Software Engineer, AI Compiler
C++ Machine Learning Engineer, Models Training
Gdańsk, Pomeranian Voivodeship, Poland; Warszawa, Masovian Voivodeship, Poland
GCC Compiler Engineer
Machine Learning Engineer - AI Models
