Customer
Job
Field Application Engineer - AI Software & Hardware
Europe; Munich, Germany
Customer - Operations
DFT Engineer, Automotive Robotics
Munich, Germany
Emulation Engineer, Automotive Robotics
Munich Site Manager
SOC Architect - Chiplet
Software Architect, Automotive Robotics
Sr. Staff Design Verification Engineer, Automotive Robotics
Engineering - Hardware
AI/ML Physical Design Flow Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Full-Chip Physical Design Verification Engineer
Physical Design Engineer, PnR
Physical Design Engineer - STA
Staff Engineer, Physical Design
Staff Technical Program Manager, Physical Design
Static Timing Analysis (STA) Methodology Engineer
Top Level Physical Design Engineer
Design Verification Lead, AI Hardware
Toronto, Ontario, Canada
Director, Customer Hardware Engineering
Senior Engineer, System-Level Design Verification
Sr Engineer, AI Kernel
Austin, Texas, United States; Toronto, Ontario, Canada
Engineering - Hardware / AI Hardware
Senior Embedded Engineer, AI IP
Performance Architect, AI HW
Power Architect
Risc-V Architect
Chiplet Physical Design Engineer
United States
DFT Engineer
Engineer, SoC RTL Engineer
Tokyo, Japan
Fabric SOC Architect
Interconnect and Compute Architect
Memory Architect
North America
Physical Design Engineer
Power Design Engineer
RISC-V AI / HPC & Agentic Software Engineer
新北市, New Taipei City, Taiwan
RISC-V AI / HPC & Agentic Software Engineering Lead
Senior DFT Engineer, Architecture
Verification Engineer
Japan
Engineering - Hardware / Architecture
Technical Program Manager, Architecture
Santa Clara, California, United States
Automotive and Robotics SOC Architect
Chiplet Design ArchitectNew
RISC-V CPU Microarchitecture / RTL
CPU Verification Fellow, RISC-V High-Performance Processor
CPU Architect, Load-Store
Sr. Performance Modeling Architect
Austin, Texas, United States; Santa Clara, California, United States
Staff, RTL Engineer
United States; 新北市, New Taipei City, Taiwan
CPU Core Design Verification Testbench Lead
CPU Core Design Verification Test Generator Lead
Director, RISC-V Software TPM & Ops
Australia; United States
Engineering Program Manager, RISCV
Austin, Texas, United States
(India) System IP Design Engineer
Bengaluru, Karnataka, India
Sr. Engineer, CPU RTL Design
Sr. Engineer, Performance Infrastructure
