
Staff Engineer, Physical Design Flow
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
Tenstorrent is seeking a creative and driven Physical Design Flow Engineer to redefine how our world-class AI silicon is built. In this role, you’ll develop, optimize, and automate advanced implementation flows, harnessing industry tools and ML-based solutions to push the boundaries of performance, power, and area.
This role is hybrid, based out of Santa Clara, CA, Austin, TX, or Fort Collins, CO.
We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.
Who You Are
- Passionate about building and automating robust RTL-to-GDS physical design flows for high-performance chips.
- Experienced collaborator who thrives on solving end-to-end design challenges across diverse teams.
- Analytical thinker with a talent for enhancing PPA at every step of the implementation process.
- Adaptable, eager to learn, and quick to leverage new tools and technologies to improve productivity.
What We Need
- 5+ years in physical design/CAD methodology on advanced nodes, with a strong portfolio of CAD flow development.
- Hands-on expertise with industry-standard tools (e.g., Synopsys, Cadence) for synthesis, place-and-route, STA, and signoff.
- Proficiency in optimizing PPA and runtime efficiency across all stages, including hierarchical flows and chip assembly.
- Experience partnering with EDA vendors and driving tool improvements; strong scripting and CAD automation skills a plus.
What You Will Learn
- Tenstorrent’s methodologies for scaling and accelerating physical design across industry-defining AI/ML chips.
- Advanced ML-based automation and optimization strategies for PPA and productivity.
- Cross-team integration: collaborating with physical verification, RC extraction, and timing analysis experts.
- How your work influences and shapes future EDA tool development and complex silicon tapeouts.
Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.
Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.
Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set by the U.S. government.
Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.
If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government. If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.
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