Customer
Job
DFT Engineer, Automotive Robotics
Munich, Germany
Emulation Engineer, Automotive Robotics
Munich Site Manager
SOC Architect - Chiplet
Software Architect, Automotive Robotics
Sr. Staff Design Verification Engineer, Automotive Robotics
Sr. Staff RTL Engineer, Automotive Robotics
Engineering - Hardware
Design Verification Lead, AI Hardware
Toronto, Ontario, Canada
Director of Customer Engineering
IP Software Generalist
Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Senior Engineer, System-Level Design Verification
Staff Technical Program Manager, AI Systems and IP Delivery
North America
Engineering - Hardware / AI Hardware
Performance Architect, AI HW
Power Architect
Risc-V Architect
Senior Design Verification Engineer, AI HW
Austin, Texas, United States; Toronto, Ontario, Canada
Chiplet Physical Design Engineer
United States
Fabric SOC Architect
Interconnect and Compute Architect
Memory Architect
Power Architect, AI Data Center Chiplets
Power Design Engineer
Tokyo, Japan
RISC-V AI / HPC & Agentic Software Engineer
新北市, New Taipei City, Taiwan
RISC-V AI / HPC & Agentic Software Engineering Lead
Senior DFT Engineer, Architecture
Senior Physical Design Engineer
Staff Engineer, SoC RTL Engineer
Verification Engineer
Japan
Engineering - Hardware / Architecture
Technical Program Manager, Architecture
Santa Clara, California, United States
Automotive and Robotics SOC Architect
RISC-V CPU Microarchitecture / RTL
AI Performance Simulation Architect
CPU Architect, Load-Store
Staff Technical Program Manager, Physical Design
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
Engineering - Hardware / Physical Engineering
AI/ML Physical Design Flow Engineer
Full-Chip Physical Design Verification Engineer
Physical Design Engineer, PnR
Physical Design Engineer - STA
Staff Engineer, Physical Design
Static Timing Analysis (STA) Methodology Engineer
Top Level Physical Design Engineer
CPU Core Design Verification Testbench Lead New
Austin, Texas, United States; Santa Clara, California, United States
CPU Core Design Verification Test Generator Lead
Engineering Program Manager, RISCV
Austin, Texas, United States
Sr. Engineer, Performance Infrastructure
Sr.Staff, Design Verification - CPU Cluster / SoC
Bengaluru, Karnataka, India
Sr Staff Engineer, CPU System Microarchitect
Sr. Staff Engineer, Post-Silicon Validation
Sr. Staff Engineer, RISC-V Software Workload Enablement
Australia; United States
