Customer
Job
Design Verification Engineer, Automotive Robotics
Munich, Germany
DFT Engineer, Automotive Robotics
Emulation Engineer, Automotive Robotics
Field Application Engineer, Automotive Robotics
Functional Safety Hardware Engineer, Automotive Robotics
Munich Site Manager
RTL Engineer, Automotive Robotics
SOC Architect
Software Architect, Automotive Robotics
Engineering - Hardware
Sr. RTL Design Engineer - Tensix
Austin, Texas, United States; Toronto, Ontario, Canada
Engineering - Hardware / AI Hardware
Performance Architect, AI HW
Toronto, Ontario, Canada
Power Architect
Risc-V Architect
Senior Design Verification Engineer, AI HW
ASIC Networking Engineer
United States
Chiplet Physical Design Engineer
Fabric SOC Architect
Memory Architect
North America
Power Architect, AI Data Center Chiplets
RISC-V AI / HPC & Agentic Software EngineerNew
新北市, New Taipei City, Taiwan
RISC-V AI / HPC & Agentic Software Engineering Lead
Senior DFT Engineer, Architecture
Japan
Verification Engineer
Engineering - Hardware / Architecture
Technical Program Manager, Architecture
Santa Clara, California, United States
Automotive and Robotics SOC Architect
RISC-V CPU Microarchitecture / RTL
CPU Design Verification Technical Lead
Formal Verification Engineer
AI Performance Simulation Architect New
CPU Architect, Load-Store
Engineering - Hardware / Physical Engineering
AI/ML Physical Design Flow Engineer
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States
AI Subsystems Physical Design LeadNew
Physical Design Engineer - STA
Austin, Texas, United States; Fort Collins, Colorado, United States; Santa Clara, California, United States; United States
Static Timing Analysis (STA) Methodology Engineer
Director, RISC-V Software Ecosystem
Engineering Program Manager, RISCV
Austin, Texas, United States
Sr. Engineer, Performance InfrastructureNew
Sr.Staff, Design Verification - CPU Cluster / SoC
Bengaluru, Karnataka, India
Sr. Staff Engineer, Automotive System Software
Sr Staff Engineer, CPU System Microarchitect
Sr. Staff Engineer, Post-Silicon Validation
Staff Engineer Design Verification
Staff Engineer, Emulation Technical LeadNew
Staff Engineer, Software Release and Packaging - RISC V
Australia; Canada; United States
Engineering - Hardware / RISC V
Sr. Staff Engineer, DevOps - Automation and Software Tooling
Technical Program Manager, RISCV Customer
Staff Design for Test Engineer
Austin, Texas, United States; Santa Clara, California, United States
Staff, Design for Test Engineer (DFT)
Engineering - Hardware / Silicon
Staff Design for Test STA Engineer
