Intern - CXL Memory Solutions (Summer 2026)
Work Model: Onsite
Duration: May 2026 - July 2026
We are seeking a CXL (Compute Express Link) Memory Architecture Engineer to drive the development of next-generation memory solutions using CXL technology. The ideal candidate will work on advanced CXL memory architectures, performance optimization, and system integration, enabling HPC, AI workloads, and data center applications.
- Research and develop CXL-based memory solutions, including CXL memory controllers, coherence protocols, and data movement strategies.
- Work on system-level performance modeling, simulation, and benchmarking of CXL-enabled architectures.
- Collaborate with hardware, firmware, and software teams to integrate CXL memory into modern computing platforms.
- Develop latency, bandwidth, and power efficiency optimizations for CXL-attached memory modules.
- Analyze workloads for AI, HPC, and cloud computing to enhance CXL memory utilization and efficiency.
- Contribute to CXL specification development and actively participate in industry consortiums and standardization efforts.
- Support FPGA/ASIC prototyping and hardware/software co-design for CXL-enabled solutions.
- Engage with hyperscalers, data center architects, and storage/memory vendors to shape the future of CXL adoption.
- Master's degree in Electrical Engineering, Computer Engineering, or a related field.
- Strong understanding of CXL protocols and memory subsystems.
- Knowledge of hardware/software co-design principles and memory hierarchy optimizations.
- Proficiency in hardware description languages (Verilog/VHDL), C/C++, Python, and performance modeling tools.
- Experience in digital circuit design, computer architecture, or VLSI design.
- Knowledge of system-level performance analysis, profiling, and optimization techniques.
- Ph.D. in a relevant field with research experience in CXL memory architectures.
- Hands-on experience with FPGA prototyping, or HW design for memory-intensive workloads.
- Understanding of AI/ML accelerators, hyperscale data center requirements, and emerging compute trends.
- Experience in memory architecture design, DRAM controllers, and cache coherence mechanisms.
- Familiarity with PCIe-based memory expansion, HBM, and NVM technologies.
SKHYA is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees, and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information or any other status protected under federal, state, or local applicable laws.
Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.
Pay Range
$26 - $50 USD
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