Senior Field Applications Engineer

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure. Our Intelligent Connectivity Platform integrates PCIe®, CXL®, and Ethernet semiconductor-based solutions and the COSMOS software suite of system management and optimization tools to deliver a software-defined architecture that is both scalable and customizable. Inspired by trusted relationships with hyperscalers and the data center ecosystem, we are an innovation leader delivering products that are flexible and interoperable. Discover how we are transforming modern data-driven applications at www.asteralabs.com. 

Job Description

As an Astera Labs Field Applications Engineer, you will be a trusted technical advisor to the world’s leading cloud service providers, server hardware designers, and networking OEMs, as you work closely with them to design solutions that use Astera Labs’ portfolio of connectivity products. In this role, you will identify and understand customer requirements, propose Astera Labs solutions, and provide hands-on design-in support. You will have an important role in driving innovation, partnering with customers as well as with our world-class engineering teams. Your feedback will help drive the product roadmap in order to deliver results and value to the customer.

Basic Qualifications

• BS in electrical engineering. Master’s degree in engineering is preferred.

• Minimum of 5 years’ experience working with Cloud service providers and server OEM customers to design in complex SoC/silicon products for Server & Storage.

• Customer-oriented, Goal-driven, Self-motivated, be able to work independently and be able to travel frequently to customer sites.

• Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!

Required Experience

• Hands-on, thorough knowledge of high-speed & low speed protocols like PCIe, Ethernet, CXL, DDR, NVME, I2C, SPI, UART etc.

• Strong working knowledge of PCIe LTSSM at a physical layer level, associated standards, and debug. Most recent experience with PCIe 4.0 at a minimum, some experience with 5.0/CXL preferred.

• Silicon/System bring-up and debug experience in customer systems.

• Firsthand experience with lab equipment such as protocol analyzers/exercisers, high-speed oscilloscopes, or BERTs.

• A strong background in high-speed board design techniques, and understanding of Data Center systems like Server and PCIe Add in Cards.

Preferred Experience

• Firmware development with C-language, scripting with Python or other equivalent programming languages.

• Development/support for PCIe, CXL, DDR4/ DDR5 in Data Center Systems.

• Knowledge of simulation/modeling, schematic capture, and PCB layout tools from Cadence, Altium and others etc.

• Understanding and Capturing performance metrics like Latency, Bandwidth, Power for CPU, Memory, PCIe, DDR

• Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.