Principal Digital SoC Design Verification Engineer
InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays.
Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation.
To learn more about GreenWave Radios™ and hear what our employees have to say, visit the GreenWave™ certification profile at GreatPlacetoWork.com or explore our Home - GreenWave Radios website.
We are looking for an experienced Principal Digital SoC Design Verification Engineer to work with a team of engineers in developing innovative Open RAN SoC functional blocks for 5G cellular base stations. As an individual contributor, you will be responsible for developing high-quality digital solutions from initial concept to mass production and ensuring successful product implementation through effective verification strategies. You will provide technical leadership in creating comprehensive verification plans, evaluating verification coverage, and ensuring seamless in-house and third-party IP integration. You will also collaborate across the organization, working closely with Product Management, System Engineering, and HW/FW Design teams to align high-level requirements with implementation.
This full-time position is in San Diego, CA.
Key Responsibilities:
- Verification Planning and Execution:
- Create, manage, and drive comprehensive product verification plans for complex SoCs, ensuring all functional requirements are thoroughly validated.
- Continuously evaluate verification coverage, identify gaps, and implement mitigation strategies to ensure thorough testing.
- Oversee the SoC verification process from start to finish, ensuring timely and high-quality results.
- Cross-functional Collaboration:
- Collaborate with Systems Engineering and HW/FW Design teams to ensure clear understanding of product requirements and implementation strategies.
- Contribute to and review SoC specifications and architectures from a verification perspective to ensure feasibility and completeness.
- Product Delivery and Debugging:
- Support the debugging of verification failures and facilitate resolution through detailed analysis and proactive mitigation.
- Own the process of bringing highly integrated mixed-signal SoCs from concept to mass production, ensuring all verification and product requirements are met.
- Continuous Improvement:
- Drive the development and adoption of best practices in SoC verification, leveraging new tools and technologies such as UVM, formal verification, and continuous integration techniques.
- Maintain a deep understanding of digital SoC intricacies, including high-performance design, multiple clock domains, and wireless communication protocols.
Job Requirements:
- Master's and/or Bachelor’s degree in engineering (or equivalent) in EC/ EE/ CS
- At least 15 years of experience in digital SoC verification
- Proven success in technical leadership of complex SoC verification projects from concept to mass production
- Hands-on experience in SystemVerilog, Verilog, mixed-signal SoC simulation, and FPGA-based verification
- Deep understanding of digital and mixed-signal IP integration, including custom RTL and digital/analog co-verification
- Familiarity with HW emulators, embedded systems, wireless protocols, and signal processing
- Proficiency in programming languages such as C, Python, and Tcl for test bench architectures and automation
- Excellent communication and presentation skills, capable of effectively conveying technical details to both technical and non-technical stakeholders
Desirable Skills:
- Track record of successfully executing block or chip-level verification plans.
- Deep understanding of the complete verification life cycle (test plan, testbench through coverage closure).
- Knowledge of Cadence verification tools and UVM verification methodologies.
- Experience with wireless communication standards such as 3GPP, WiFi, 4G/5G, or similar technologies.
- Ability to thrive in environments with changing or incomplete requirements while developing creative solutions and workarounds.
Compensation and Benefits:
At InnoPhase, our compensation package includes base pay and pre-IPO stock options. The base pay range for this role is between $140K-$225K. Your base pay will depend on the market, interview results, skills, qualifications, experience, education, and location. Our employee benefits include a comprehensive group health plan, matching 401(k), training reimbursement, and various paid leaves (vacation, sick, holidays, maternity/paternity leave, jury). Visit our website to learn more about our employee benefits.
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