Senior Analog Mixed-Signal IC Layout Engineer
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions grounded in open standards. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. Discover more at www.asteralabs.com.
-
Bachelor or advanced Diploma degree in EE
-
2+ years of experience developing layout for highspeed analog IC designs in finFET technology
-
Experience with layout extraction tools and to analyze layout parasitic to achieve high quality layout for highspeed circuits
-
EMIR and antenna DRC rules aware layout practices
-
Experience writing SKILL and TCL scripts is highly recommended
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
Apply for this job
*
indicates a required field