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Sr. Staff Formal Verification Engineer

Austin, Texas, United States

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is building cutting-edge AI technology, unifying advances across software, hardware and systems. Our team developed a high-performance RISC-V CPU from scratch and shares a passion for solving hard problems. We’re growing and hiring at all levels.

As a CPU Formal Verification Engineer, you’ll apply formal methods to identify bugs in specs and RTL for a high-performance, data center-class CPU. 

This role is hybrid, based out of Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. 

Who You Are

  • Experienced verification engineer with a strong background in formal methods and digital logic.
  • Comfortable working across CPU design, microarchitecture, and verification to root out subtle logic bugs.
  • Skilled in working with tools like Jasper, VC-Formal, Questa, or Yosys for property checking and formal regression.
  • Proficient with Verilog/SystemVerilog, SVA, and scripting languages for automation.

What We Need

  • Ability to scope and execute formal verification plans across CPU blocks.
  • Experience writing assertions, cover properties, and connectivity checks.
  • Strong debugging skills to triage formal failures and drive resolution with designers.
  • Experience with complexity analysis and mitigations
  • Passion for automation and driving formal testbenches into regression flow

What You Will Learn

  • Deep dive into cutting-edge RISC-V CPU microarchitecture built from the ground up.
  • How to blend open-source and commercial formal tools to create scalable flows.
  • Collaborate closely with microarchitecture, DV, and RTL teams to ship robust silicon.
  • Contribute to evolving formal methodologies in a fast-moving AI hardware environment.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.

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