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Stimulus Engineer

United States

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

We are looking for a Stimulus Engineer responsible for stimulus development at core, cluster, emulation and post-silicon environment.

This role is Hybrid, based out of Austin, TX or Santa Clara, CA.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

 

Responsibilities:

  • Responsible for stimulus development at core, cluster, emulation and post-silicon environment
  • Develop CPU microarchitecture related scenarios on in-house stimulus generation tool
  • Develop testplans related to RISC-V architectural features and CPU microarchitectural features
  • Work closely with designers to validate the stimulus developed
  • Write and analyze coverage of developed stimulus
  • Develop environment for stimulus generation from pre-silicon to emulation to post-silicon level
  • Work with design, verification and post-silicon teams to develop new stimulus and recreate bugs

 

Experience & Qualifications:

  • BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of experience
  • Strong background and experience with high performance OOO CPU microarchitecture especially with load/store, caches and memory subsystem
  • Experience working on an x86, ARM or RISCV based CPU stimulus generation
  • Architectural understanding of address translation, memory ordering, cache coherence protocols, memory consistency, multi-processors and fabric topologies
  • Significant experience with stimulus generation at pre-silicon, emulation or post-silicon environment
  • Experience with C / Assembly / C++ / Python 
  • Strong problem solving and debug skills

 

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology.  Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2).   These requirements apply to persons located in the U.S. and all countries outside the U.S.  As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency.  If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.

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